Stony Brook University (SUNY)
Department of Physics and Astronomy
Cadence* University Program Member

This page describes customization of Cadence products
for design of Josephson junctions based electronics.**

Academic Research Projects and Classes:
  • V. Semenov, Active magnetic shielding (Custom IC)
  • V. Semenov, Reversible Computing (Custom IC)
  • V. Semenov, Superconductor Digital Circuits with Low Energy Dissipation (Custom IC)
  • D. Averin, PHY699, Dissertation Supervision (Custom IC)
  • V. Semenov, PHY585, Special Study (Custom IC)


  • Tools to verify Schematics
    ERC Stands for ElectRical Connectivity. This set of rules quickly checks the basic correctness of the schematics. For example, existance of the path from the power net to the ground net. This is useful to quickly check schematic extracted from Layout view.
    PSCAN PSCAN is well known simulator of superconductive circuits. Link on the left points to the script with PSCAN netlister, toolbar with elements from rsfq.basic library (such as Josephson junctions), PSCAN initialization dialog and some other useful routines.

    Tools to verify Layouts
    DRC Design Rules Check. A set of rules to check relative positions of the objects in the same or different layers. In other words, this is a check for compliance with the fabrication technology.
    EXT A set of rules that describes the correspondence of layers to the schematic elements. By means of these rules a schematic can be Extracted from a layout. This step is required in order to do other layout checks.
    LVS Layout Versus Schematics script checks the correspondence of Layout and Schematics views. It verifies correct connectivity and properties of the elements.
    L-Meter L-Meter is a program written by Paul Bunyk. It is a tool to extract inductances of superconductive elements. The link on the left points to the script that generates input information for L-meter from Cadence Layout views. In addition, this script can generate resisors and inductances.

    Automated Layout generation Tools
    JJ Pcell We have developed a comprehensive library of Pcells that includes all the elementary objects necessary for design of complex superconducting digital circuits. JJ Pcell is our first version of a Josephson junction Pcell for HYPRES fabrication technology.


    [Extract][DRC][ERC][LVS]
    RSFQ Lab Home Page Back to: RSFQ Lab Home Page Cadence Licence professor: Vasili Semenov
    Page support: Nikolai Joukov
    Page was last updated on July 10, 2019


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